Nature

First demonstration of in-memory computing crossbar using multi-level Cell FeFET

Although the demand for data transmission is increasing globally, it is expected that the future will prioritize data-centric local intelligence at the edge node. This, in turn, will inevitably ...
AFP

TetraMem Announces 22nm Multi-Level RRAM Analog In-Memory Computing SoC Milestone

TetraMem Inc., a Silicon Valley–based semiconductor company developing analog in-memory computing (IMC) solutions, today announced the successful tape-out, manufacturing, and initial silicon ...
Nature

Scalable and robust multi-bit spintronic synapses for analog in-memory computing

The pursuit of high-performance and energy-efficient computing for data-intensive algorithms such as deep neural networks (DNN) opens up exciting opportunities for emerging non-volatile memories (NVM) ...
Semiconductor Engineering

FeFET Multi-Level Cells For In-Memory Computing In 28nm

A technical paper titled “First demonstration of in-memory computing crossbar using multi-level Cell FeFET” was published by researchers at Robert Bosch, University of Stuttgart, Indian Institute of ...
Phys.org

Superconducting nanowire memory array achieves significantly lower error rate

Quantum computers, systems that process information leveraging quantum mechanical effects, will require faster and energy-efficient memory components, which will allow them to perform well on complex ...
Semiconductor Engineering

Demonstrating A 2D–0D Hybrid Optical Multi-Level Memory Device Operated By Laser Pulses

A technical paper titled “Probing Optical Multi-Level Memory Effects in Single Core–Shell Quantum Dots and Application Through 2D-0D Hybrid Inverters” was published by researchers at Korea Institute ...