There is considerable ongoing discussion on how to contain exponentially increasing test costs for systems-on-chip (SoCs) and microprocessors. As the transistor geometry shrinks and more transistors ...
Time is money in electronics, as in other industries, and the more time that is invested in testing chips means more costs being added to the product in question. To speed up testing for memory ...
The test economics of state-of-the-art smartphones, tablets and routers demand highly parallel RF test. We are addressing this next wave in RF communications test, enabled by Wi-Fi 6E, operating in ...
Developing an automated production test solution for current and next-generation complex RF SIP/SOC devices is an increasingly difficult task. Both the test program and the device interface board (DIB ...
SAN FRANCISCO — During the Semicon West trade show, Agilent, Credence and Electroglas separately rolled out automatic test equipment (ATE) solutions to attack chip-testing costs. Electroglas Inc.
It should come as no surprise that Moore's Law of regularly doubling chip capacity is having an impact on automatic test equipment (ATE) for ICs. ATE, of course, applies patterns of signals and checks ...
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